Solid-state transformer figure sources

Two figures were drawn for the website on 29 October 2026 in the shared site palette; the DAB schematic is taken, at the author’s request, from the author’s own report.

• /images/research/sst/sst-stage-configurations.svg summarises the single-, two- and three-stage SST configurations as classified in Fulong Li’s ASSIST WP6 review (2022), by the number of DC links.
• /images/research/sst/dab-topology.png is Figure 2 of Fulong Li’s DAB design report for the Cardiff University collaboration (February 2026), extracted unchanged from the PDF (embedded image, 1418 × 362).
• /images/research/sst/dab-inductor-window.svg places the stated limits from Fulong Li’s DAB design report for the Cardiff University collaboration (February 2026) on a logarithmic axis: 28 µH and 1.1 mH bounds, and 250 µH selected.

The design values quoted on the page (15 kW rating, 7.5 kW minimum, 375 W and 37 W power steps, phase shift, RMS currents, conduction losses, 99.84% conduction-only efficiency and the 32 W ZVS limit) are taken from Section 2.2.5 of that report.